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» On the Use of Formal Techniques for Validation
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ICDCS
2010
IEEE
15 years 10 months ago
Visual, Log-Based Causal Tracing for Performance Debugging of MapReduce Systems
Abstract—The distributed nature and large scale of MapReduce programs and systems poses two challenges in using existing profiling and debugging tools to understand MapReduce pr...
Jiaqi Tan, Soila Kavulya, Rajeev Gandhi, Priya Nar...
COMPSAC
2004
IEEE
15 years 10 months ago
Robustness Study of an Embedded Operating System for Industrial Applications
Critical industrial applications or fault tolerant applications need for operating systems (OS) which guarantee a correct and safe behaviour in spite of the appearance of errors. ...
Juan Pardo, José Carlos Campelo, Juan Jos&e...
ICCAD
2003
IEEE
140views Hardware» more  ICCAD 2003»
16 years 3 months ago
Block-based Static Timing Analysis with Uncertainty
Static timing analysis is a critical step in design of any digital integrated circuit. Technology and design trends have led to significant increase in environmental and process v...
Anirudh Devgan, Chandramouli V. Kashyap
ICDE
2009
IEEE
159views Database» more  ICDE 2009»
16 years 1 months ago
Efficient Private Record Linkage
— Record linkage is the computation of the associations among records of multiple databases. It arises in contexts like the integration of such databases, online interactions and...
Mohamed Yakout, Mikhail J. Atallah, Ahmed K. Elmag...
APPT
2009
Springer
16 years 1 months ago
Performance Improvement of Multimedia Kernels by Alleviating Overhead Instructions on SIMD Devices
SIMD extension is one of the most common and effective technique to exploit data-level parallelism in today’s processor designs. However, the performance of SIMD architectures i...
Asadollah Shahbahrami, Ben H. H. Juurlink