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» On the Use of Formal Techniques for Validation
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FMCAD
2009
Springer
16 years 1 months ago
Scaling VLSI design debugging with interpolation
—Given an erroneous design, functional verification returns an error trace exhibiting a mismatch between the specification and the implementation of a design. Automated design ...
Brian Keng, Andreas G. Veneris
SIGSOFT
2009
ACM
16 years 7 months ago
Automatic steering of behavioral model inference
Many testing and analysis techniques use finite state models to validate and verify the quality of software systems. Since the specification of such models is complex and timecons...
David Lo, Leonardo Mariani, Mauro Pezzè
FAST
2008
15 years 9 months ago
Parity Lost and Parity Regained
RAID storage systems protect data from storage errors, such as data corruption, using a set of one or more integrity techniques, such as checksums. The exact protection offered by...
Andrew Krioukov, Lakshmi N. Bairavasundaram, Garth...
ASIACRYPT
2009
Springer
16 years 1 months ago
Security Notions and Generic Constructions for Client Puzzles
Computational puzzles are mildly difficult computational problems that require resources (processor cycles, memory, or both) to solve. Puzzles have found a variety of uses in secu...
Liqun Chen, Paul Morrissey, Nigel P. Smart, Bogdan...
CVPR
2008
IEEE
16 years 8 months ago
A recursive filter for linear systems on Riemannian manifolds
We present an online, recursive filtering technique to model linear dynamical systems that operate on the state space of symmetric positive definite matrices (tensors) that lie on...
Ambrish Tyagi, James W. Davis