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» On the Use of Formal Techniques for Validation
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DSN
2007
IEEE
16 years 28 days ago
Architecture-Level Soft Error Analysis: Examining the Limits of Common Assumptions
This paper concerns the validity of a widely used method for estimating the architecture-level mean time to failure (MTTF) due to soft errors. The method first calculates the fai...
Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. ...
PPDP
2007
Springer
16 years 22 days ago
Mechanized metatheory model-checking
The problem of mechanically formalizing and proving metatheoretic properties of programming language calculi, type systems, operational semantics, and related formal systems has r...
James Cheney, Alberto Momigliano
TKDE
2012
229views Formal Methods» more  TKDE 2012»
13 years 9 months ago
Effective Pattern Discovery for Text Mining
—Many data mining techniques have been proposed for mining useful patterns in text documents. However, how to effectively use and update discovered patterns is still an open rese...
Ning Zhong, Yuefeng Li, Sheng-Tang Wu
VLSID
2002
IEEE
138views VLSI» more  VLSID 2002»
16 years 7 months ago
A Framework for Design Space Exploration of Parameterized VLSI Systems
The paper presents two new approaches to multiobjective design space exploration for parametric VLSI systems. Both considerably reduce the number of simulations needed to determin...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
RE
2008
Springer
15 years 6 months ago
"Fairness Analysis" in Requirements Assignments
Requirements engineering for multiple customers, each of whom have competing and often conflicting priorities, raises issues of negotiation, mediation and conflict resolution. Thi...
Anthony Finkelstein, Mark Harman, S. Afshin Mansou...