3742 search results - page 199 / 749 » On the Use of Formal Techniques for Validation |
160
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IPPS
1998
IEEE
15 years 10 months ago
1998
IEEE
Parallel programming continues to be difficult and error-prone, whether starting from specifications or from an existing sequential program. This paper presents (1) a methodology f...
159
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FPL
2005
Springer
16 years 22 hour ago
2005
Springer
This paper describes a novel Field Programmable Gate Array (FPGA) logic synthesis technique which determines if a logic function can be implemented in a given programmable circuit...
174
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ENTCS
2002
15 years 6 months ago
2002
The MaC system has been developed to provide assurance that a target program is running correctly with respect to formal requirements specification. This is achieved by monitoring...
152
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CAV
2003
Springer
15 years 11 months ago
2003
Springer
Abstract. We present a new method for the generation of linear invariants which reduces the problem to a non-linear constraint solving problem. Our method, based on Farkas’ Lemma...
156
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DAC
1997
ACM
15 years 10 months ago
1997
ACM
This paper presents a verification technique which is specifically targeted to formally comparing large combinational circuits with some structural similarities. The approach co...