3742 search results - page 166 / 749 » On the Use of Formal Techniques for Validation |
178
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SIGSOFT
2009
ACM
16 years 7 months ago
2009
ACM
System specifications have long been expressed through automata-based languages, enabling verification techniques such as model checking. These verification techniques can assess ...
160
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CBMS
2006
IEEE
16 years 15 days ago
2006
IEEE
This paper describes techniques used in a Web-based decision support system to enhance dermatological diagnosis for rural and remote communities. We proposed a technique to improv...
173
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FM
2001
Springer
15 years 11 months ago
2001
Springer
The Irish School of Constructive Mathematics (M♣ c ), which extends the VDM, exploits an algebraic notation based upon monoids and their morphisms for the purposes of abstract mo...
136
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FMCAD
2006
Springer
15 years 10 months ago
2006
Springer
We introduce a finer concept of a Hardware Machine, where the set of post-reboot operation states is explicitly a part of the FSM definition. We formalize an ad-hoc flow of combin...
178
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GLVLSI
2008
IEEE
16 years 27 days ago
2008
IEEE
Due to the increasing complexity of today’s embedded systems, the analysis and validation of such systems is becoming a major challenge. UML is gradually adopted in the embedded...