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» On the Use of Formal Techniques for Validation
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FMCAD
2000
Springer
15 years 10 months ago
The Semantics of Verilog Using Transition System Combinators
Abstract. Since the advent of model checking it is becoming more common for languages to be given a semantics in terms of transition systems. Such semantics allow to model check pr...
Gordon J. Pace
ITC
2002
IEEE
99views Hardware» more  ITC 2002»
15 years 11 months ago
Verifying Properties Using Sequential ATPG
This paper develops a novel approach for formally verifying both safety and liveness properties of designs using sequential ATPG tools. The properties are automatically mapped int...
Jacob A. Abraham, Vivekananda M. Vedula, Daniel G....
ECRTS
2002
IEEE
15 years 11 months ago
Managing Multi-Mode Tasks with Time Cost and Quality Levels using Optimal Discrete Control Synthesis
Real-time control systems are complex to design, and automation support is important. We are interested in systems with multiple tasks, each with multiple modes, implementing a fu...
Hervé Marchand, Éric Rutten
ICCCN
2007
IEEE
16 years 22 days ago
A Proactive Test Based Differentiation Technique to Mitigate Low Rate DoS Attacks
— Low rate DoS attacks are emerging threats to the TCP traffic, and the VoIP traffic in the Internet. They are hard to detect as they intelligently send attack traffic inside the...
Amey Shevtekar, Nirwan Ansari
DGO
2007
174views Education» more  DGO 2007»
15 years 7 months ago
New techniques for ensuring the long term integrity of digital archives
A large portion of the government, business, cultural, and scientific digital data being created today needs to be archived and preserved for future use of periods ranging from a ...
Sangchul Song, Joseph JáJá