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» On the Use of Formal Techniques for Validation
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DAC
2002
ACM
16 years 7 months ago
A universal technique for fast and flexible instruction-set architecture simulation
In the last decade, instruction-set simulators have become an essential development tool for the design of new programmable architectures. Consequently, the simulator performance ...
Achim Nohl, Gunnar Braun, Oliver Schliebusch, Rain...
ICS
2004
Tsinghua U.
15 years 11 months ago
Energy conservation techniques for disk array-based servers
In this paper, we study energy conservation techniques for disk array-based network servers. First, we introduce a new conservation technique, called Popular Data Concentration (P...
Eduardo Pinheiro, Ricardo Bianchini
BMCBI
2006
205views more  BMCBI 2006»
15 years 6 months ago
Application of Petri net based analysis techniques to signal transduction pathways
Background: Signal transduction pathways are usually modelled using classical quantitative methods, which are based on ordinary differential equations (ODEs). However, some diffic...
Andrea Sackmann, Monika Heiner, Ina Koch
PLDI
2009
ACM
16 years 1 months ago
Proving optimizations correct using parameterized program equivalence
Translation validation is a technique for checking that, after an optimization has run, the input and output of the optimization are equivalent. Traditionally, translation validat...
Sudipta Kundu, Zachary Tatlock, Sorin Lerner
ISICT
2003
15 years 7 months ago
On the automated implementation of modal logics used to verify security protocols
: Formal verification provides a rigid and thorough means of evaluating the correctness of cryptographic protocols so that even subtle defects can be identified. As the application...
Tom Coffey, Reiner Dojen, Tomas Flanagan