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ICALP
2005
Springer
15 years 12 months ago
New Approaches for Virtual Private Network Design
Virtual Private Network Design is the following NP-hard problem. We are given a communication network, represented as a weighted graph with thresholds on the nodes which represent...
Friedrich Eisenbrand, Fabrizio Grandoni, Gianpaolo...
SPIN
2004
Springer
15 years 11 months ago
Explicit State Model Checking with Hopper
The Murϕ-based Hopper tool is a general purpose explicit model checker. Hopper leverages Murϕ’s class structure to implement new algorithms. Hopper differs from Murϕ in that i...
Michael Jones, Eric Mercer
IPPS
2002
IEEE
15 years 11 months ago
Implementing Associative Search and Responder Resolution
In a paper presented last year at WMPP’01 [Walker01], we described the initial prototype of an associative processor implemented using field-programmable logic devices (FPLDs). ...
Meiduo Wu, Robert A. Walker, Jerry L. Potter
CODES
2009
IEEE
15 years 11 months ago
MinDeg: a performance-guided replacement policy for run-time reconfigurable accelerators
Reconfigurable Processors utilize a reconfigurable fabric (to implement application-specific accelerators) and may perform runtime reconfigurations to exchange the set of deployed...
Lars Bauer, Muhammad Shafique, Jörg Henkel
ASPDAC
2010
ACM
637views Hardware» more  ASPDAC 2010»
15 years 4 months ago
A new graph-theoretic, multi-objective layout decomposition framework for double patterning lithography
As Double Patterning Lithography(DPL) becomes the leading candidate for sub-30nm lithography process, we need a fast and lithography friendly decomposition framework. In this pape...
Jae-Seok Yang, Katrina Lu, Minsik Cho, Kun Yuan, D...