Sciweavers

9871 search results - page 97 / 1975
» On the Structure of Low Sets
Sort
View
MSN
2005
Springer
142views Sensor Networks» more  MSN 2005»
15 years 11 months ago
Efficient Multiplexing Protocol for Low Bit Rate Multi-point Video Conferencing
This paper discusses an efficient implementation of the multiplexing protocol H.223, which is an important part of 3G-324M protocol stack required for 3G mobile multimedia communic...
Haohuan Fu, Xiaowen Li, Ji Shen, Weijia Jia
ASPDAC
2004
ACM
129views Hardware» more  ASPDAC 2004»
15 years 11 months ago
Instruction buffering exploration for low energy VLIWs with instruction clusters
— For multimedia applications, loop buffering is an efficient mechanism to reduce the power in the instruction memory of embedded processors. In particular, software controlled ...
Tom Vander Aa, Murali Jayapala, Francisco Barat, G...
ASPDAC
2004
ACM
107views Hardware» more  ASPDAC 2004»
15 years 11 months ago
Fast, predictable and low energy memory references through architecture-aware compilation
The design of future high-performance embedded systems is hampered by two problems: First, the required hardware needs more energy than is available from batteries. Second, curren...
Peter Marwedel, Lars Wehmeyer, Manish Verma, Stefa...
ISCAS
2003
IEEE
77views Hardware» more  ISCAS 2003»
15 years 11 months ago
Inductive interconnect width optimization for low power
The width of an interconnect line a ects the total power consumed by a circuit. A tradeo exists, however, between the dynamic power and the short-circuit power in determining the ...
Magdy A. El-Moursy, Eby G. Friedman
EVOW
1999
Springer
15 years 10 months ago
Test Pattern Generation Under Low Power Constraints
A technique is proposed to reduce the peak power consumption of sequential circuits during test pattern application. High-speed computation intensive VLSI systems, as telecommunica...
Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Re...