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» On the Representation of Timed Polyhedra
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LCTRTS
2007
Springer
16 years 12 days ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
DATE
2006
IEEE
113views Hardware» more  DATE 2006»
16 years 10 days ago
Automatic ADL-based operand isolation for embedded processors
Cutting-edge applications of future embedded systems demand highest processor performance with low power consumption to get acceptable battery-life times. Therefore, low power opt...
Anupam Chattopadhyay, B. Geukes, David Kammler, Er...
FGR
2006
IEEE
156views Biometrics» more  FGR 2006»
16 years 10 days ago
A Realtime Shrug Detector
A realtime system for shrug detection is discussed in this paper. The system is automatically initialized by a face detector based on Ada-boost[14]. After frontal face is localize...
Huazhong Ning, Tony X. Han, Yuxiao Hu, ZhenQiu Zha...
IROS
2006
IEEE
202views Robotics» more  IROS 2006»
16 years 9 days ago
Topological characterization of mobile robot behavior
— We propose to classify the behaviors of a mobile robot thanks to topological methods as an alternative to metric ones. To do so, we adapt an analysis scheme from Physics of non...
Aurélien Hazan, Frédéric Dave...
MEMOCODE
2006
IEEE
16 years 8 days ago
Latency-insensitive design and central repetitive scheduling
The theory of latency-insensitive design (LID) was recently invented to cope with the time closure problem in otherwise synchronous circuits and programs. The idea is to allow the...
Julien Boucaron, Robert de Simone, Jean-Vivien Mil...