The share of leakage in cache power consumption increases with technology scaling. Choosing a higher threshold voltage (Vth) and/or gate-oxide thickness (Tox) for cache transistor...
This paper describes a technique for re-ordering of scan cells to minimize power dissipation that is also capable of reducing the area overhead of the circuit compared to a random...
This paper describes a technique for calculating the switching activity of a set of registers shared by dierent data values. Based on the assumption that the joint pdf (probabili...
We present a game-theoretic treatment of distributed power control in CDMA wireless systems. We make use of the conceptual framework of noncooperative game theory to obtain a distr...
Tansu Alpcan, Tamer Basar, R. Srikant, Eitan Altma...
Testing of VLSI circuits can cause generation of excessive heat which can damage the chips under test. In the random testing environment, high-performance CMOS circuits consume sig...
Artem Sokolov, Alodeep Sanyal, L. Darrell Whitley,...