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FPGA
2001
ACM
152views FPGA» more  FPGA 2001»
15 years 10 months ago
A pipelined architecture for partitioned DWT based lossy image compression using FPGA's
Discrete wavelet transformations (DWT) followed by embedded zerotree encoding is a very efficient technique for image compression [2, 5, 4]. However, the algorithms proposed in l...
Jörg Ritter, Paul Molitor
SPAA
1998
ACM
15 years 10 months ago
Fast Set Operations Using Treaps
We present parallel algorithms for union, intersection and difference on ordered sets using random balanced binary trees (treaps [26]). For two sets of size n and m (m ≤ n) the...
Guy E. Blelloch, Margaret Reid-Miller
ICCAD
1996
IEEE
151views Hardware» more  ICCAD 1996»
15 years 10 months ago
Expected current distributions for CMOS circuits
The analysis of CMOS VLSI circuit switching current has become an increasingly important and difficult task from both a VLSI design and simulation software perspective. This paper...
Dennis J. Ciplickas, Ronald A. Rohrer
COCOA
2009
Springer
15 years 10 months ago
Positive Influence Dominating Set in Online Social Networks
Online social network has developed significantly in recent years as a medium of communicating, sharing and disseminating information and spreading influence. Most of current resea...
Feng Wang 0002, Erika Camacho, Kuai Xu
HIPEAC
2009
Springer
15 years 10 months ago
HeDGE: Hybrid Dataflow Graph Execution in the Issue Logic
Abstract. Exposing more instruction-level parallelism in out-of-order superscalar processors requires increasing the number of dynamic in-flight instructions. However, large instru...
Suriya Subramanian, Kathryn S. McKinley