Abstract— In this paper, we investigate the problem of minimizing the average transmission power of users while guaranteeing the average delay constraints in time-varying uplink ...
We explore the revenue capabilities of truthful, monotone (“fair”) allocation and pricing functions for resource-constrained auction mechanisms within a general framework that ...
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...
Robots must complete their tasks in spite of unreliable actuators and limited, noisy sensing. In this paper, we consider the information requirements of such tasks. What sensing a...
We develop a rigorous semantics for Power and ARM multiprocessor programs, including their relaxed memory model and the behaviour of reasonable fragments of their instruction sets...
Jade Alglave, Anthony C. J. Fox, Samin Ishtiaq, Ma...