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DATE
2010
IEEE
168views Hardware» more  DATE 2010»
15 years 11 months ago
A new placement algorithm for the mitigation of multiple cell upsets in SRAM-based FPGAs
Modern FPGAs have been designed with advanced integrated circuit techniques that allow high speed and low power performance, joined to reconfiguration capabilities. This makes new...
Luca Sterpone, Niccolò Battezzati
DATE
2010
IEEE
165views Hardware» more  DATE 2010»
15 years 11 months ago
Multicore soft error rate stabilization using adaptive dual modular redundancy
— The use of dynamic voltage and frequency scaling (DVFS) in contemporary multicores provides significant protection from unpredictable thermal events. A side effect of DVFS can ...
Ramakrishna Vadlamani, Jia Zhao, Wayne P. Burleson...
DATE
2010
IEEE
192views Hardware» more  DATE 2010»
15 years 11 months ago
PhoenixSim: A simulator for physical-layer analysis of chip-scale photonic interconnection networks
—Recent developments have shown the possibility of leveraging silicon nanophotonic technologies for chip-scale interconnection fabrics that deliver high bandwidth and power effi...
Johnnie Chan, Gilbert Hendry, Aleksandr Biberman, ...
DATE
2010
IEEE
162views Hardware» more  DATE 2010»
15 years 11 months ago
Error resilience of intra-die and inter-die communication with 3D spidergon STNoC
: Scaling down in very deep submicron (VDSM) technologies increases the delay, power consumption of on-chip interconnects, while the reliability and yield decrease. In high perform...
Vladimir Pasca, Lorena Anghel, Claudia Rusu, Ricca...
EICS
2010
ACM
15 years 11 months ago
Letras: an architecture and framework for ubiquitous pen-and-paper interaction
Paper remains a prevalent medium in mobile usage contexts due to its inherent flexibility and robustness. Mobile computing solutions begin to provide powerful and convenient func...
Felix Heinrichs, Jürgen Steimle, Daniel Schre...