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ICPP
1996
IEEE
15 years 10 months ago
A Timestamp-based Selective Invalidation Scheme for Multiprocessor Cache Coherence
- Among all software cache coherence strategaes, the ones that are based on the concept of tamestamps show the greatest potentaal an terms of cache performance. The early tamestamp...
Xin Yuan, Rami G. Melhem, Rajiv Gupta
EOR
2006
117views more  EOR 2006»
15 years 6 months ago
Heuristics for selecting robust database structures with dynamic query patterns
The success of a company increasingly depends on timely information (internal or external) being available to the right person at the right time for crucial managerial decision-ma...
Andrew N. K. Chen, Paulo B. Goes, Alok Gupta, Jame...
ESWA
2008
187views more  ESWA 2008»
15 years 6 months ago
A DEA window analysis on the product family mix selection for a semiconductor fabricator
In a competitive market, semiconductor fabricator must face an environment with multi-product types, multi-priority orders and demand changes in time. Since semiconductor fabricat...
Shu-Hsing Chung, Amy Hsin-I Lee, He-Yau Kang, Chih...
ICS
1993
Tsinghua U.
15 years 10 months ago
Dynamic Control of Performance Monitoring on Large Scale Parallel Systems
Performance monitoring of large scale parallel computers creates a dilemma: we need to collect detailed information to find performance bottlenecks, yet collecting all this data ...
Jeffrey K. Hollingsworth, Barton P. Miller
IPPS
2008
IEEE
16 years 27 days ago
Model-guided performance tuning of parameter values: A case study with molecular dynamics visualization
In this paper, we consider the interaction between application programmers and tools that automatically search a space of application-level parameters that are believed to impact ...
Yiinju L. Nelson, Bhupesh Bansal, Mary W. Hall, Ai...