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FGCS
2002
153views more  FGCS 2002»
15 years 6 months ago
HARNESS fault tolerant MPI design, usage and performance issues
Initial versions of MPI were designed to work efficiently on multi-processors which had very little job control and thus static process models. Subsequently forcing them to suppor...
Graham E. Fagg, Jack Dongarra
ICCAD
2005
IEEE
131views Hardware» more  ICCAD 2005»
16 years 3 months ago
Code restructuring for improving cache performance of MPSoCs
— One of the critical goals in code optimization for MPSoC architectures is to minimize the number of off-chip memory accesses. This is because such accesses can be extremely cos...
Guilin Chen, Mahmut T. Kandemir
ICAC
2007
IEEE
16 years 23 days ago
Time-Sharing Parallel Applications with Performance Isolation and Control
Most parallel machines, such as clusters, are spaceshared in order to isolate batch parallel applications from each other and optimize their performance. However, this leads to lo...
Bin Lin, Ananth I. Sundararaj, Peter A. Dinda
CCGRID
2006
IEEE
16 years 15 days ago
Fast Freenet: Improving Freenet Performance by Preferential Partition Routing and File Mesh Propagation
The Freenet Peer-to-Peer network is doing a good job in providing anonymity to the users. But the performance of the network in terms of download speed and request hit ratio is no...
Hans-Emil Skogh, Jonas Haeggstrom, Ali Ghodsi, Ras...
ISQED
2005
IEEE
140views Hardware» more  ISQED 2005»
16 years 1 days ago
Toward Quality EDA Tools and Tool Flows Through High-Performance Computing
As the scale and complexity of VLSI circuits increase, Electronic Design Automation (EDA) tools become much more sophisticated and are held to increasing standards of quality. New...
Aaron N. Ng, Igor L. Markov