1224 search results - page 96 / 245 » On the Optimality of the Dimensionality Reduction Method |
160
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ICASSP
2010
IEEE
15 years 6 months ago
2010
IEEE
The characterization of signals and images in manifolds often lead to efficient dimensionality reduction algorithms based on manifold distance computation for analysis or classi...
159
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KES
2010
Springer
15 years 4 months ago
2010
Springer
— This work presents related areas of research, types of data collections that are visualized, technical aspects of generating visualizations, and evaluation methodologies. Exist...
132
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DATE
2010
IEEE
15 years 10 months ago
2010
IEEE
We have proposed (, )-based flow regulation to reduce delay and backlog bounds in SoC architectures, where bounds the traffic burstiness and the traffic rate. The regulation is co...
156
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ICCAD
2006
IEEE
16 years 3 months ago
2006
IEEE
Power consumption is a crucial concern in nanometer chip design. Researchers have shown that multiple supply voltage (MSV) is an effective method for power consumption reduction....
160
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ISQED
2008
IEEE
16 years 23 days ago
2008
IEEE
In this paper dual-K (DKCMOS) technology is proposed as a method for gate leakage power reduction. An integer linear programming (ILP) based algorithm is proposed for its optimiza...