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» On the Optimality of the Dimensionality Reduction Method
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ETS
2010
IEEE
174views Hardware» more  ETS 2010»
15 years 7 months ago
Test-architecture optimization for TSV-based 3D stacked ICs
Testing of 3D stacked ICs (SICs) is becoming increasingly important in the semiconductor industry. In this paper, we address the problem of test architecture optimization for 3D s...
Brandon Noia, Sandeep Kumar Goel, Krishnendu Chakr...
WSC
2008
15 years 8 months ago
An optimization framework for waferfab performance enhancement
A typical wafer fab requires numerous decisions for daily operations. Even small decisions on system configurations may have significant impact on the overall fab performance. One...
Daniel Noack, Boon-Ping Gan, Peter Lendermann, Oli...
ICDCS
2008
IEEE
16 years 24 days ago
Multi-query Optimization for Distributed Similarity Query Processing
This paper considers a multi-query optimization issue for distributed similarity query processing, which attempts to exploit the dependencies in the derivation of a query evaluati...
Yi Zhuang, Qing Li, Lei Chen 0002
CEC
2009
IEEE
15 years 11 months ago
Memetic algorithm with Local search chaining for large scale continuous optimization problems
Abstract— Memetic algorithms arise as very effective algorithms to obtain reliable and high accurate solutions for complex continuous optimization problems. Nowadays, high dimens...
Daniel Molina, Manuel Lozano, Francisco Herrera
ICCAD
1995
IEEE
163views Hardware» more  ICCAD 1995»
15 years 10 months ago
Signal integrity optimization on the pad assignment for high-speed VLSI design
Pad assignment with signal integrity optimization is very important for high-speed VLSI design. In this paper, an efficient method is proposed to effectively minimize both simulta...
Kai-Yuan Chao, D. F. Wong