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PDP
2011
IEEE
14 years 10 months ago
Quantifying Thread Vulnerability for Multicore Architectures
Abstract—Continuously reducing transistor sizes and aggressive low power operating modes employed by modern architectures tend to increase transient error rates. Concurrently, mu...
Isil Oz, Haluk Rahmi Topcuoglu, Mahmut T. Kandemir...
CLUSTER
2010
IEEE
14 years 10 months ago
Middleware support for many-task computing
Many-task computing aims to bridge the gap between two computing paradigms, high throughput computing and high performance computing. Many-task computing denotes highperformance co...
Ioan Raicu, Ian T. Foster, Mike Wilde, Zhao Zhang,...
PPOPP
2011
ACM
14 years 9 months ago
GRace: a low-overhead mechanism for detecting data races in GPU programs
In recent years, GPUs have emerged as an extremely cost-effective means for achieving high performance. Many application developers, including those with no prior parallel program...
Mai Zheng, Vignesh T. Ravi, Feng Qin, Gagan Agrawa...
TMC
2011
1105views more  TMC 2011»
15 years 1 months ago
A Privacy-Preserving Location Monitoring System for Wireless Sensor Networks
—Monitoring personal locations with a potentially untrusted server poses privacy threats to the monitored individuals. To this end, we propose a privacy-preserving location monit...
Chi-Yin Chow, Mohamed F. Mokbel, Tian He
SIGMETRICS
2011
ACM
178views Hardware» more  SIGMETRICS 2011»
14 years 9 months ago
Soft error benchmarking of L2 caches with PARMA
The amount of charge stored in an SRAM cell shrinks rapidly with each technology generation thus increasingly exposing caches to soft errors. Benchmarking the FIT rate of caches d...
Jinho Suh, Mehrtash Manoochehri, Murali Annavaram,...
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