Sciweavers

7758 search results - page 1286 / 1552
» On the Number of Distributive Lattices
Sort
View
FCCM
2004
IEEE
152views VLSI» more  FCCM 2004»
15 years 10 months ago
Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
Noriaki Suzuki, Shunsuke Kurotaki, Masayasu Suzuki...
EMSOFT
2006
Springer
15 years 10 months ago
Analysis of the zeroconf protocol using UPPAAL
We report on a case study in which the model checker Uppaal is used to formally model parts of Zeroconf, a protocol for dynamic configuration of IPv4 link-local addresses that has...
Biniam Gebremichael, Frits W. Vaandrager, Miaomiao...
GECCO
2006
Springer
210views Optimization» more  GECCO 2006»
15 years 10 months ago
Clustering the heap in multi-threaded applications for improved garbage collection
Garbage collection can be a performance bottleneck in large distributed, multi-threaded applications. Applications may produce millions of objects during their lifetimes and may i...
Myra B. Cohen, Shiu Beng Kooi, Witawas Srisa-an
GECCO
2006
Springer
164views Optimization» more  GECCO 2006»
15 years 10 months ago
Biobjective evolutionary and heuristic algorithms for intersection of geometric graphs
Wire routing in a VLSI chip often requires minimization of wire-length as well as the number of intersections among multiple nets. Such an optimization problem is computationally ...
Rajeev Kumar, Pramod Kumar Singh, Bhargab B. Bhatt...
ECCV
2010
Springer
15 years 10 months ago
Recursive Coarse-to-Fine Localization for fast Object Detection
Cascading techniques are commonly used to speed-up the scan of an image for object detection. However, cascades of detectors are slow to train due to the high number of detectors a...
Marco Pedersoli, Jordi Gonzàlez, Andrew D. Bagdan...
« Prev « First page 1286 / 1552 Last » Next »