Filinski showed that callcc and a single mutable reference cell are sufficient to express the delimited control operators shift and reset. However, this implementation interacts p...
Theoretical research has spent some years facing the problem of how to represent and provide semantics to updates of logic programs. This problem is relevant for addressing highly ...
Clock-delayed (CD) domino is a dynamic logic family developed to provide both inverting and non-inverting logic on single-rail gates. It is self-timed and can be easily pipelined ...
The standard algorithm for alignment of DNA sequences using dynamic programming has been implemented on the Cray MTA-2 (Multithreaded Architecture-2) at ENRI (Electronic Navigatio...
This paper considers the implementation of an annealing technique for dynamic power reduction in FPGAs. The proposed method comprises a power-aware objective function for placemen...