— We demonstrate a hardware implementation of a complex event processor, built on top of field-programmable gate arrays (FPGAs). Compared to CPU-based commodity systems, our sol...
During language evolution, compiler construction is usually d along two dimensions: defining new abstract syntax tree (AST) classes, or adding new operations. In order to facilita...
Xiaoqing Wu, Suman Roychoudhury, Barrett R. Bryant...
Abstract. Current paper proposes an efficient alternative for traditional gatelevel fault simulation. The authors explain how Structurally Synthesized Binary Decision Diagrams (SSB...
Jaan Raik, Raimund Ubar, Sergei Devadze, Artur Jut...
Abstract. In this paper we describe how we handle heterogeneity in web service interaction through a choreography mechanism that we have developed for IRS-III. IRS-III is a framewo...
In this paper we present a technique for prediction of electrical demand based on multiple models. The multiple models are composed by several local models, each one describing a r...
J. Jesus Rico Melgoza, Juan J. Flores, Constantino...