13591 search results - page 2611 / 2719 » On the Implementation of Dynamic Evaluation |
150
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MICRO
2006
IEEE
16 years 12 days ago
2006
IEEE
To protect processor logic from soft errors, multicore redundant architectures execute two copies of a program on separate cores of a chip multiprocessor (CMP). Maintaining identi...
182
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TRIDENTCOM
2006
IEEE
16 years 12 days ago
2006
IEEE
CSMA-based MAC protocols require wireless nodes to share the transmission medium with other nodes that are within carriersensing (CS) range. Hence, operations that depend on and c...
162
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VTC
2006
IEEE
16 years 12 days ago
2006
IEEE
Abstract— This paper describes an automatic wireless LAN access points planning approach based on a multicriteria modelling and solving. A realistic and efficient wLAN planning ...
159
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ASPLOS
2006
ACM
16 years 11 days ago
2006
ACM
Redundant threading architectures duplicate all instructions to detect and possibly recover from transient faults. Several lighter weight Partial Redundant Threading (PRT) archite...
179
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CASES
2006
ACM
16 years 11 days ago
2006
ACM
Microprocessor vendors have provided special-purpose instructions such as psadbw and pdist to accelerate the sumof-absolute differences (SAD) similarity measurement. The usefulne...