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ASPLOS
2010
ACM
15 years 10 months ago
Fairness via source throttling: a configurable and high-performance fairness substrate for multi-core memory systems
Cores in a chip-multiprocessor (CMP) system share multiple hardware resources in the memory subsystem. If resource sharing is unfair, some applications can be delayed significantl...
Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, Yale N....
186
Voted
AIPS
2010
15 years 9 months ago
Shopper: A System for Executing and Simulating Expressive Plans
We present Shopper, a plan execution engine that facilitates experimental evaluation of plans and makes it easier for planning researchers to incorporate replanning. Shopper inter...
Robert P. Goldman, John Maraist
MOBISYS
2010
ACM
15 years 9 months ago
Darwin phones: the evolution of sensing and inference on mobile phones
We present Darwin, an enabling technology for mobile phone sensing that combines collaborative sensing and classification techniques to reason about human behavior and context on ...
Emiliano Miluzzo, Cory Cornelius, Ashwin Ramaswamy...
NSDI
2007
15 years 9 months ago
Tesseract: A 4D Network Control Plane
We present Tesseract, an experimental system that enables the direct control of a computer network that is under a single administrative domain. Tesseract’s design is based on t...
Hong Yan, David A. Maltz, T. S. Eugene Ng, Hemant ...
ASPLOS
2008
ACM
15 years 8 months ago
The mapping collector: virtual memory support for generational, parallel, and concurrent compaction
Parallel and concurrent garbage collectors are increasingly employed by managed runtime environments (MREs) to maintain scalability, as multi-core architectures and multi-threaded...
Michal Wegiel, Chandra Krintz
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