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CEE
2010
97views more  CEE 2010»
15 years 5 months ago
A novel implementation of radix-4 floating-point division/square-root using comparison multiples
A new implementation for minimally redundant radix-4 floating-point SRT division/square-root (division/sqrt) with the recurrence in the signed-digit format is introduced. The imp...
Hooman Nikmehr, Braden Phillips, Cheng-Chew Lim
TVLSI
2010
15 years 1 months ago
A Low-Cost VLSI Implementation for Efficient Removal of Impulse Noise
Abstract--Image and video signals might be corrupted by impulse noise in the process of signal acquisition and transmission. In this paper, an efficient VLSI implementation for rem...
Pei-Yin Chen, Chih-Yuan Lien, Hsu-Ming Chuang
VLSID
2005
IEEE
158views VLSI» more  VLSID 2005»
16 years 7 months ago
Algorithmic Implementation of Low-Power High Performance FIR Filtering IP Cores
This paper presents two schemes for the implementation of high performance and low power FIR filtering Intellectual Property (IP) cores. Low power is achieved through the utilizat...
C. H. Wang, Ahmet T. Erdogan, Tughrul Arslan
DATE
2009
IEEE
156views Hardware» more  DATE 2009»
16 years 1 months ago
Implementation of a reduced-lattice MIMO detector for OFDM Systems
—This paper presents a novel VLSI implementation of a MIMO detector for OFDM systems. The proposed architecture is able to perform both linear MMSE and reduced latticeaided MIMO ...
Josep Soler Garrido, Henning Vetter, Magnus Sandel...
DATE
2007
IEEE
97views Hardware» more  DATE 2007»
16 years 28 days ago
Systematic comparison between the asynchronous and the multi-synchronous implementations of a network on chip architecture
In this paper we present a systematic comparison between two different implementations of a distributed Network on Chip: fully asynchronous and multi-synchronous. The NoC architec...
Abbas Sheibanyrad, Ivan Miro Panades, Alain Greine...