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PSB
2001
15 years 8 months ago
A Multithreaded Parallel Implementation of a Dynamic Programming Algorithm for Sequence Comparison
This paper discusses the issues involved in implementing a dynamic programming algorithm for biological sequence comparison on a generalpurpose parallel computing platform based o...
W. S. Martins, Juan del Cuvillo, F. J. Useche, Kev...
ICDE
2011
IEEE
262views Database» more  ICDE 2011»
14 years 10 months ago
Memory-constrained aggregate computation over data streams
— In this paper, we study the problem of efficiently computing multiple aggregation queries over a data stream. In order to share computation, prior proposals have suggested ins...
K. V. M. Naidu, Rajeev Rastogi, Scott Satkin, Anan...
ICSE
2003
IEEE-ACM
16 years 7 months ago
Patterns, Frameworks, and Middleware: Their Synergistic Relationships
The knowledge required to develop complex software has historically existed in programming folklore, the heads of experienced developers, or buried deep in the code. These locatio...
Douglas C. Schmidt, Frank Buschmann
ASPLOS
2010
ACM
16 years 1 months ago
Flexible architectural support for fine-grain scheduling
To make efficient use of CMPs with tens to hundreds of cores, it is often necessary to exploit fine-grain parallelism. However, managing tasks of a few thousand instructions is ...
Daniel Sanchez, Richard M. Yoo, Christos Kozyrakis
ISCA
2008
IEEE
188views Hardware» more  ISCA 2008»
16 years 1 months ago
MIRA: A Multi-layered On-Chip Interconnect Router Architecture
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
Dongkook Park, Soumya Eachempati, Reetuparna Das, ...