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ICCAD
1997
IEEE
91views Hardware» more  ICCAD 1997»
15 years 11 months ago
Interconnect layout optimization under higher-order RLC model
In this paper, we study the interconnect layout optimization problem under a higher-order RLC model to optimize not just delay, but also waveform for RLC circuits with non-monoton...
Jason Cong, Cheng-Kok Koh
ICCAD
1996
IEEE
141views Hardware» more  ICCAD 1996»
15 years 11 months ago
An observability-based code coverage metric for functional simulation
Functional simulation is the most widely used method for design verification. At various levels of abstraction, e.g., behavioral, register-transfer level and gate level, the design...
Srinivas Devadas, Abhijit Ghosh, Kurt Keutzer
EMMCVPR
1997
Springer
15 years 11 months ago
Deterministic Annealing for Unsupervised Texture Segmentation
Abstract. In this paper a rigorous mathematical framework of deterministic annealing and mean-field approximation is presented for a general class of partitioning, clustering and ...
Thomas Hofmann, Jan Puzicha, Joachim M. Buhmann
RTSS
1996
IEEE
15 years 11 months ago
Visual assessment of a real-time system design: a case study on a CNC controller
In this paper we describe our experiments on a realtime system design, focusing on design alternatives such as scheduling jitter, sensor-to-output latency, intertask communication...
Namyun Kim, Minsoo Ryu, Seongsoo Hong, Manas Sakse...
VLSID
1993
IEEE
136views VLSI» more  VLSID 1993»
15 years 11 months ago
A Simulation-Based Test Generation Scheme Using Genetic Algorithms
This paper discusses a Genetic Algorithm-based method of generating test vectorsfor detecting faults in combinational circuits. The GA-based approach combines the merits of two te...
M. Srinivas, Lalit M. Patnaik