We propose a novel dependable SRAM with 7T cells and their array structure that avoids a half-selection problem. In addition, we introduce a new concept, "quality of a bit (Q...
We present a new style of long-distance, on-chip interconnect, based loosely on the asynchronous GasP architecture. It has a number of advantages over conventional designs, the mo...
Dynamic noise analysis is greatly needed in place of traditional static noise analysis due to the ever increasingly stringent design requirement for VLSI chips based on very deep ...
Development of the process technology for dual threshold (dual Vth ) CMOS circuit has opened up the possibility of using it to reduce static power in low voltage high performance ...
Nikhil Tripathi, Amit M. Bhosle, Debasis Samanta, ...
The success of RFID in supply chain management is leading many to consider more personal and pervasive deployments of this technology. Unlike industrial settings, however, deploym...