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» On the Distribution of Keys by Hashing
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HPCA
2006
IEEE
16 years 6 months ago
Retention-aware placement in DRAM (RAPID): software methods for quasi-non-volatile DRAM
Measurements of an off-the-shelf DRAM chip confirm that different cells retain information for different amounts of time. This result extends to DRAM rows, or pages (retention tim...
Ravi K. Venkatesan, Stephen Herr, Eric Rotenberg
HPCA
2006
IEEE
16 years 6 months ago
Reducing resource redundancy for concurrent error detection techniques in high performance microprocessors
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
Sumeet Kumar, Aneesh Aggarwal
HPCA
2006
IEEE
16 years 6 months ago
InfoShield: a security architecture for protecting information usage in memory
Cyber theft is a serious threat to Internet security. It is one of the major security concerns by both network service providers and Internet users. Though sensitive information c...
Guofei Gu, Hsien-Hsin S. Lee, Joshua B. Fryman, Ju...
HPCA
2005
IEEE
16 years 6 months ago
Performance, Energy, and Thermal Considerations for SMT and CMP Architectures
Simultaneous multithreading (SMT) and chip multiprocessing (CMP) both allow a chip to achieve greater throughput, but their relative energy-efficiency and thermal properties are s...
Yingmin Li, David Brooks, Zhigang Hu, Kevin Skadro...
HPCA
2005
IEEE
16 years 6 months ago
Tapping ZettaRAMTM for Low-Power Memory Systems
ZettaRAMTM is a new memory technology under development by ZettaCoreTM as a potential replacement for conventional DRAM. The key innovation is replacing the conventional capacitor...
Ravi K. Venkatesan, Ahmed S. Al-Zawawi, Eric Roten...