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ICASSP
2009
IEEE
16 years 1 months ago
Rate-distortion optimized bitstream extractor for motion scalability in scalable video coding
Motion scalability is designed to improve the coding efficiency of a scalable video coding framework, especially in the medium to low range of decoding bit rates or spatial resol...
Meng-Ping Kao, Truong Nguyen
DATE
2010
IEEE
166views Hardware» more  DATE 2010»
15 years 11 months ago
A special-purpose compiler for look-up table and code generation for function evaluation
Abstract—Elementary functions are extensively used in computer graphics, signal and image processing, and communication systems. This paper presents a special-purpose compiler th...
Yuanrui Zhang, Lanping Deng, Praveen Yedlapalli, S...
GLOBECOM
2009
IEEE
15 years 10 months ago
Adding Integrity Verification Capabilities to the LDPC-Staircase Erasure Correction Codes
File distribution is becoming a key technology, in particular in large scale content broadcasting systems like DVBH/SH. They largely rely on Application Level FEC codes (ALFEC) in ...
Mathieu Cunche, Vincent Roca
APCCAS
2006
IEEE
241views Hardware» more  APCCAS 2006»
15 years 8 months ago
A Fast Algorithm and Its Architecture for Motion Estimation in MPEG-4 AVC/H.264 Video Coding
The paper presents a hardware friendly fast algorithm and its architecture for motion estimation (ME) in H.264 video coding. The fast algorithm adopts the quarter pel subsampling a...
Chia-Chun Lin, Yu-Kun Lin, Tian-Sheuan Chang
FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
16 years 16 days ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski