A novel progressive geometry compression scheme is presented in the paper. In this scheme a mesh is represented as a base mesh followed by some groups of vertex split operations us...
This paper presents an extensive empirical evaluation of an interprocedural parallelizing compiler, developed as part of the Stanford SUIF compiler system. The system incorporates...
Mary W. Hall, Saman P. Amarasinghe, Brian R. Murph...
We present a new programming language designed to allow the convenient expression of algorithms for a parallel random access machine (PRAM). The language attempts to satisfy two p...
In this paper, we introduce new concepts and methods for checking the correctness of control flow instructions during the execution of programs in embedded CPUs. Detecting and avoi...
This paper describes a novel technique called Embedded Test-bench Control (ETC), extensively used in the verification of Tensilica’s latest configurable processor. Conventional ...