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» On the Computational Power of Winner-Take-All
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VLSID
2007
IEEE
98views VLSI» more  VLSID 2007»
16 years 6 months ago
Power Reduction in VLIW Processor with Compiler Driven Bypass Network
Neeraj Goel, Anshul Kumar, Preeti Ranjan Panda
VLSID
2005
IEEE
108views VLSI» more  VLSID 2005»
16 years 6 months ago
Design of a Low Power Image Watermarking Encoder Using Dual Voltage and Frequency
Saraju P. Mohanty, N. Ranganathan, K. Balakrishnan
EWSN
2010
Springer
16 years 1 months ago
Exploiting Overlapping Channels for Minimum Power Configuration in Real-Time Sensor Networks
Xiaodong Wang, Xiaorui Wang, Guoliang Xing, Yanjun...