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VLSID
2007
IEEE
104views VLSI» more  VLSID 2007»
16 years 7 months ago
Customization of Register File Banking Architecture for Low Power
Register file banking is an effective alternative to monolithic register files in embedded processor based systems. In this work, we propose techniques for performing application s...
Rakesh Nalluri, Rohan Garg, Preeti Ranjan Panda
VLSID
2003
IEEE
103views VLSI» more  VLSID 2003»
16 years 7 months ago
Minimum Dynamic Power CMOS Circuit Design by a Reduced Constraint Set Linear Program
In the previous work, the problem of nding gate delays to eliminate glitches has been solved by linear programs (LP) requiring an exponentially large number ofconstraints. By intr...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
VLSID
2002
IEEE
149views VLSI» more  VLSID 2002»
16 years 7 months ago
Functional Partitioning for Low Power Distributed Systems of Systems-on-a-Chip
In this paper, we present a functional partitioning method for low power real-time distributed embedded systems whose constituent nodes are systems-on-a-chip (SOCs). The systemlev...
Yunsi Fei, Niraj K. Jha
ASPDAC
2009
ACM
143views Hardware» more  ASPDAC 2009»
16 years 1 months ago
Statistical modeling and analysis of chip-level leakage power by spectral stochastic method
In this paper, we present a novel statistical full-chip leakage power analysis method. The new method can provide a general framework to derive the full-chip leakage current or po...
Ruijing Shen, Ning Mi, Sheldon X.-D. Tan, Yici Cai...
WCNC
2008
IEEE
16 years 29 days ago
Joint Power and Bandwidth Allocation in Multihop Wireless Networks
Abstract—This paper considers power and bandwidth allocation to maximize the end-to-end rate in a multihop wireless network. Assuming an orthogonal frequency division multiplexin...
Deqiang Chen, J. Nicholas Laneman