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ATS
2004
IEEE
87views Hardware» more  ATS 2004»
15 years 10 months ago
Low Power BIST with Smoother and Scan-Chain Reorder
In this paper, we propose a low-power testing methodology for the scan-based BIST. A smoother is included in the test pattern generator (TPG) to reduce average power consumption d...
Nan-Cheng Lai, Sying-Jyan Wang, Yu-Hsuan Fu
TREC
2007
15 years 7 months ago
Lymba's PowerAnswer 4 in TREC 2007
This paper reports on Lymba Corporation’s (a spinoff of Language Computer Corporation) participation in the TREC 2007 Question Answering track. An overview of the PowerAnswer 4 ...
Dan I. Moldovan, Christine Clark, Moldovan Bowden
ENTCS
2006
109views more  ENTCS 2006»
15 years 6 months ago
Roles as a Coordination Construct: Introducing powerJava
In this paper we apply the role metaphor to coordination. Roles are used in sociology as a way to structure organizations and to coordinate their behavior. In our model, the featu...
Matteo Baldoni, Guido Boella, Leendert W. N. van d...
DAC
2007
ACM
16 years 7 months ago
Scan Test Planning for Power Reduction
Many STUMPS architectures found in current chip designs allow disabling of individual scan chains for debug and diagnosis. In a recent paper it has been shown that this feature can...
Christian G. Zoellin, Hans-Joachim Wunderlich, Jen...
DAC
1999
ACM
16 years 7 months ago
Memory Exploration for Low Power, Embedded Systems
In embedded system design, the designer has to choose an onchip memory configuration that is suitable for a specific application. To aid in this design choice, we present a memory...
Wen-Tsong Shiue, Chaitali Chakrabarti