7200 search results - page 187 / 1440 » On the Computational Power of Winner-Take-All |
171
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HOTDEP
2008
15 years 8 months ago
2008
We observe that existing methods for failure-tolerance are inefficient in their use of time, storage and computational resources. We aim to harness the power of idle desktop compu...
154
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DAC
2007
ACM
16 years 7 months ago
2007
ACM
Packet-switched networks on chip (NoC) have been advocated as a natural communication mechanism among the processing cores in future chip multiprocessors (CMP). However, electroni...
155
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VLSID
2008
IEEE
16 years 6 months ago
2008
IEEE
Compared to subthreshold leakage, dynamic power is normally much less sensitive to the process variation due to its approximately linear relation to the process parameters. Howeve...
129
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VLSID
2006
IEEE
16 years 6 months ago
2006
IEEE
A low power multilevel interconnect architecture that uses wave-pipelined multiplexed (WPM) interconnect routing is proposed in this paper. WPM takes advantage of existing interco...
143
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VLSID
2006
IEEE
16 years 6 months ago
2006
IEEE
This paper presents a novel architecture using the decorrelating (DECOR) transformation technique when applied to an LMS adaptive filter. The DECOR transform has been evaluated pr...