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DAC
1998
ACM
16 years 7 months ago
Multi-Pad Power/Ground Network Design for Uniform Distribution of Ground Bounce
This paper presents a method for power and ground (p/g) network routing for high speed CMOS chips with multiple p/g pads. Our objective is not to reduce the total amount of the gr...
Jaewon Oh, Massoud Pedram
DAC
2005
ACM
16 years 7 months ago
Leakage efficient chip-level dual-Vdd assignment with time slack allocation for FPGA power reduction
To reduce power, Vdd programmability has been proposed recently to select Vdd-level for interconnects and to powergate unused interconnects. However, Vdd-level converters used in ...
Yan Lin, Lei He
CAMP
2005
IEEE
16 years 2 days ago
Low Power Image Processing: Analog Versus Digital Comparison
— In this paper, a programmable analog retina is presented and compared with state of the art MPU for embedded imaging applications. The comparison is based on the energy require...
Jacques-Olivier Klein, Lionel Lacassagne, Herv&eac...
COLCOM
2005
IEEE
16 years 1 days ago
Supporting workspace-mediated interaction in collaborative presentations with CoPowerPoint
Effective interaction among participants is crucial to the success of a presentation. The workspace of a presentation, which is the presentation slides, is a natural and effective...
Steven Xia, David Sun, Chengzheng Sun, David Chen
ISCAS
2003
IEEE
99views Hardware» more  ISCAS 2003»
15 years 11 months ago
Time-delay modelling for multi-layer power systems
Modelling of multi-layer power system interactions will become increasingly important as market mechanisms and feedback controls become more tightly coupled into the physical syst...
Ian A. Hiskens