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ICPP
2003
IEEE
15 years 11 months ago
Performance and Power Impact of Issue-width in Chip-Multiprocessor Cores
In chip-multiprocessors (CMPs), the number of cores and the issue width of each core presents an important design trade-off to balance the amount of TLP and ILP between multi-thre...
Magnus Ekman, Per Stenström
GI
2001
Springer
15 years 11 months ago
Improving Goodput by Relaying in Transmission-Power-Limited Wireless Systems
In wireless communication systems, the capacity of a cell (the amount of correctly delivered traffic in unit time) is a precious resource that can not be arbitrarily increased. T...
Seble Mengesha, Holger Karl, Adam Wolisz
WCNC
2010
IEEE
15 years 10 months ago
Impact of Power Control on Relay Load Balancing in Wireless Sensor Networks
—When shortest path routing is employed in large scale multi-hop wireless networks, nodes located near the center of the network have to perform disproportional amount of relayin...
Parth H. Pathak, Rudra Dutta
DAC
2005
ACM
15 years 8 months ago
Sign bit reduction encoding for low power applications
This paper proposes a low power technique, called SBR (Sign Bit Reduction) which may reduce the switching activity in multipliers as well as data buses. Utilizing the multipliers ...
M. Saneei, Ali Afzali-Kusha, Zainalabedin Navabi
TCAD
1998
127views more  TCAD 1998»
15 years 6 months ago
Gate-level power estimation using tagged probabilistic simulation
In this paper, we present a probabilistic simulation technique to estimate the power consumption of a cmos circuit under a general delay model. This technique is based on the noti...
Chih-Shun Ding, Chi-Ying Tsui, Massoud Pedram