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CORR
2010
Springer
196views Education» more  CORR 2010»
15 years 6 months ago
Low Power Reversible Parallel Binary Adder/Subtractor
In recent years, Reversible Logic is becoming more and more prominent technology having its applications in Low Power CMOS, Quantum Computing, Nanotechnology, and Optical Computin...
H. G. Rangaraju, U. Venugopal, K. N. Muralidhara, ...
DAC
2000
ACM
16 years 7 months ago
Dynamic power management of complex systems using generalized stochastic Petri nets
In this paper, we introduce a new technique for modeling and solving the dynamic power management (DPM) problem for systems with complex behavioral characteristics such as concurr...
Qinru Qiu, Qing Wu, Massoud Pedram
APNOMS
2007
Springer
16 years 16 days ago
Standby Power Control Architecture in Context-Aware Home Networks
Standby power is the energy consumed by appliances when they are not performing their main functions or when they are switched off. In this paper, we propose a Host-Agent based sta...
Joon Heo, Jihyuk Heo, Choong Seon Hong, Seok Bong ...
AINA
2005
IEEE
15 years 12 months ago
CAM-Based Huffman Decoding Made Power Efficient
Ternary content addressable (TCAM) is favorable for high-speed search due to its parallel architecture and ability for searching arbitrary-length keys. However, the usage of TCAM ...
Pi-Chung Wang, Chun-Liang Lee, Yuan-Rung Yang, Hun...
DAC
1999
ACM
15 years 10 months ago
Power Conscious Fixed Priority Scheduling for Hard Real-Time Systems
Power efficient design of real-time systems based on programmable processors becomes more important as system functionality is increasingly realized through software. This paper ...
Youngsoo Shin, Kiyoung Choi