Sciweavers

7200 search results - page 1130 / 1440
» On the Computational Power of Winner-Take-All
Sort
View
DFT
2007
IEEE
103views VLSI» more  DFT 2007»
16 years 1 months ago
Reliable Network-on-Chip Using a Low Cost Unequal Error Protection Code
The network-on-chip (NoC) paradigm is seen as a way of facilitating the integration of a large number of computational and storage blocks on a chip to meet several performance and...
Avijit Dutta, Nur A. Touba
DSD
2007
IEEE
164views Hardware» more  DSD 2007»
16 years 1 months ago
An Efficient Hardware Architecture for Quarter-Pixel Accurate H.264 Motion Estimation
In this paper, we present an efficient hardware architecture for real-time implementation of quarter-pixel accurate variable block size motion estimation for H.264 / MPEG4 Part 10...
Serkan Oktem, Ilker Hamzaoglu
DSD
2007
IEEE
120views Hardware» more  DSD 2007»
16 years 1 months ago
Cotransformation Provides Area and Accuracy Improvement in an HDL Library for LNS Subtraction
The reduction of the cumbersome operations of multiplication, division, and powering to addition, subtraction and multiplication is what makes the Logarithmic Number System (LNS) ...
Panagiotis D. Vouzis, Sylvain Collange, Mark G. Ar...
FBIT
2007
IEEE
16 years 1 months ago
Discrimination of Virtual Environments Under Visual and Haptic Rendering Delays
Many virtual reality systems have a distributed structure for certain purposes such as more computational power, tele-presence, collaboration, and portability. However, network de...
In Lee, Seungmoon Choi
FUZZIEEE
2007
IEEE
16 years 1 months ago
Toward Multiple-agent Extensions of Possibilistic Logic
— Possibilistic logic is essentially a formalism for handling qualitative uncertainty with an inference machinery that remains close to the one of classical logic. It is capable ...
Didier Dubois, Henri Prade
« Prev « First page 1130 / 1440 Last » Next »