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184
Voted
ISCA
2010
IEEE
15 years 12 months ago
2010
IEEE
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
200
Voted
CF
2010
ACM
15 years 12 months ago
2010
ACM
We develop two simple interval-based models for dynamic superscalar processors. These models allow us to: i) predict with great accuracy performance and power consumption under va...
167
Voted
CF
2010
ACM
15 years 12 months ago
2010
ACM
As the number of transistors on a chip doubles with every technology generation, the number of on-chip cores also increases rapidly, making possible in a foreseeable future to des...
191
Voted
INFOCOM
2002
IEEE
15 years 11 months ago
2002
IEEE
— For wireless cellular and ad hoc networks with QoS constraints, we propose a suite of problem formulations that allocate network resources to optimize SIR, maximize throughput ...
246
Voted
GSN
2009
Springer
15 years 11 months ago
2009
Springer
A wireless sensor network deployment on a glacier in Iceland is described. The system uses power management as well as power harvesting to provide long-term environment sensing. Ad...