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ICCAD
1994
IEEE
61views Hardware» more  ICCAD 1994»
15 years 10 months ago
Simultaneous driver and wire sizing for performance and power optimization
In this paper, we study the simultaneousdriver and wire sizing (SDWS) problem under two objective functions: (i) delay minimization only, or (ii) combined delay and power dissipat...
Jason Cong, Cheng-Kok Koh
JUCS
2010
106views more  JUCS 2010»
15 years 4 months ago
A Heuristic Approach to Positive Root Isolation for Multiple Power Sums
: Given a multiple power sum (extending polynomial’s exponents to real numbers), the positive root isolation problem is to find a list of disjoint intervals, satisfying that the...
Ming Xu, Chuandong Mu, Zhenbing Zeng, Zhi-bin Li
DSN
2009
IEEE
15 years 4 months ago
ICT resilience of power control systems: experimental results from the CRUTIAL testbeds
Distributed intelligence and secure interconnected communication networks constitute recognized key factors for the economic operation of electricity infrastructures in competitiv...
Giovanna Dondossola, Fabrizio Garrone, Judit Szant...
DAC
2011
ACM
14 years 6 months ago
Efficient incremental analysis of on-chip power grid via sparse approximation
In this paper, a new sparse approximation technique is proposed for incremental power grid analysis. Our proposed method is motivated by the observation that when a power grid net...
Pei Sun, Xin Li, Ming Yuan Ting
VLSID
2005
IEEE
121views VLSI» more  VLSID 2005»
16 years 6 months ago
A Heuristic for Peak Power Constrained Design of Network-on-Chip (NoC) Based Multimode Systems
Designing NoC-based systems has become increasingly complex with support for multiple functionalities. Decisions regarding interconnections between the heterogeneous system compon...
Praveen Bhojwani, Rabi N. Mahapatra, Eun Jung Kim,...