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» On the Computational Complexity of Spatio-Temporal Logics
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ICCAD
1994
IEEE
82views Hardware» more  ICCAD 1994»
15 years 10 months ago
A timing analysis algorithm for circuits with level-sensitive latches
For a logic design with level-sensitive latches, we need to validate timing signal paths which may flush through several latches. We developed efficient algorithms based on the mo...
Jin-fuw Lee, Donald T. Tang, C. K. Wong
AAAI
2006
15 years 7 months ago
Merging Stratified Knowledge Bases under Constraints
In this paper, we propose a family of operators for merging stratified knowledge bases under integrity constraints. The operators are defined in a model-theoretic way. Our merging...
Guilin Qi, Weiru Liu, David A. Bell
DLOG
2006
15 years 7 months ago
DL Actions with GCIs: a Pragmatic Approach
We recently proposed action formalisms based on description logics (DLs) as decidable fragments of well-established action theories such as the Situation Calculus and the Fluent C...
Hongkai Liu, Carsten Lutz, Maja Milicic, Frank Wol...
ASPDAC
1998
ACM
65views Hardware» more  ASPDAC 1998»
15 years 10 months ago
A Redundant Fault Identification Algorithm with Exclusive-OR Circuit Reduction
−This paper describes a new redundant fault identification algorithm with Exclusive-OR circuit reduction. The experimental results using this algorithm with a FAN-based test patt...
Miyako Tandai, Takao Shinsha
CORR
2008
Springer
104views Education» more  CORR 2008»
15 years 8 months ago
A General Notion of Useful Information
In this paper we introduce a general framework for defining the depth of a sequence with respect to a class of observers. We show that our general framework captures all depth not...
Philippe Moser