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» On the Computational Complexity of Spatio-Temporal Logics
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ISVLSI
2005
IEEE
169views VLSI» more  ISVLSI 2005»
15 years 11 months ago
High Performance Array Processor for Video Decoding
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
DATE
1998
IEEE
153views Hardware» more  DATE 1998»
15 years 10 months ago
An Energy-Conscious Exploration Methodology for Reconfigurable DSPs
As the "system-on-a-chip" concept is rapidly becoming a reality, time-to-market and product complexity push the reuse of complex macromodules. Circuits combining a varie...
Jan M. Rabaey, Marlene Wan
ICCAD
2005
IEEE
90views Hardware» more  ICCAD 2005»
16 years 3 months ago
Scalable compositional minimization via static analysis
State-equivalence based reduction techniques, e.g. bisimulation minimization, can be used to reduce a state transition system to facilitate subsequent verification tasks. However...
Fadi A. Zaraket, Jason Baumgartner, Adnan Aziz
EPIA
2007
Springer
16 years 10 days ago
Towards Tractable Local Closed World Reasoning for the Semantic Web
Recently, the logics of minimal knowledge and negation as failure MKNF [12] was used to introduce hybrid MKNF knowledge bases [14], a powerful formalism for combining open and clos...
Matthias Knorr, José Júlio Alferes, ...
ECML
2003
Springer
15 years 11 months ago
Robust k-DNF Learning via Inductive Belief Merging
A central issue in logical concept induction is the prospect of inconsistency. This problem may arise due to noise in the training data, or because the target concept does not fit...
Frédéric Koriche, Joël Quinquet...