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» On the Complexity of the Interlace Polynomial
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ICCAD
2003
IEEE
161views Hardware» more  ICCAD 2003»
16 years 3 months ago
A General S-Domain Hierarchical Network Reduction Algorithm
This paper presents an efficient method to reduce complexities of a linear network in s-domain. The new method works on circuit matrices directly and reduces the circuit complexi...
Sheldon X.-D. Tan
LICS
2009
IEEE
16 years 1 months ago
Logics with Rank Operators
—We introduce extensions of first-order logic (FO) and fixed-point logic (FP) with operators that compute the rank of a definable matrix. These operators are generalizations o...
Anuj Dawar, Martin Grohe, Bjarki Holm, Bastian Lau...
ISVLSI
2002
IEEE
129views VLSI» more  ISVLSI 2002»
15 years 11 months ago
Accelerating Retiming Under the Coupled-Edge Timing Model
Retiming has been shown to be a powerful technique for improving the performance of synchronous circuits. However, even though retiming algorithms of polynomial time complexity ha...
Ingmar Neumann, Kolja Sulimma, Wolfgang Kunz
FOCS
2000
IEEE
15 years 11 months ago
Fast parallel circuits for the quantum Fourier transform
We give new bounds on the circuit complexity of the quantum Fourier transform (QFT). We give an upper bound of Ç´ÐÓ Ò · ÐÓ ÐÓ ´½ µµ on the circuit depth for computin...
Richard Cleve, John Watrous
APAL
2007
131views more  APAL 2007»
15 years 6 months ago
Bounded fixed-parameter tractability and reducibility
We study a refined framwork of parameterized complexity theory where the parameter dependendence of fixed-parameter tractable algorithms is not arbitrary, but restricted by a fu...
Rod Downey, Jörg Flum, Martin Grohe, Mark Wey...