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MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
16 years 9 days ago
Virtually Pipelined Network Memory
We introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput eve...
Banit Agrawal, Timothy Sherwood
SCAM
2006
IEEE
16 years 9 days ago
Bug Classification Using Program Slicing Metrics
In this paper, we introduce 13 program slicing metrics for C language programs. These metrics use program slice information to measure the size, complexity, coupling, and cohesion...
Kai Pan, Sunghun Kim, E. James Whitehead Jr.
ASPLOS
2006
ACM
16 years 8 days ago
Combinatorial sketching for finite programs
Sketching is a software synthesis approach where the programmer develops a partial implementation — a sketch — and a separate specification of the desired functionality. The ...
Armando Solar-Lezama, Liviu Tancau, Rastislav Bod&...
CASES
2006
ACM
16 years 8 days ago
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitr...
COMPGEOM
2006
ACM
16 years 8 days ago
Algorithms for two-box covering
We study the problem of covering a set of points or polyhedra in 3 with two axis-aligned boxes in order to minimize a function of the measures of the two boxes, such as the sum or...
Esther M. Arkin, Gill Barequet, Joseph S. B. Mitch...
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