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CC
2008
Springer
144views System Software» more  CC 2008»
15 years 8 months ago
Control Flow Emulation on Tiled SIMD Architectures
Heterogeneous multi-core and streaming architectures such as the GPU, Cell, ClearSpeed, and Imagine processors have better power/ performance ratios and memory bandwidth than tradi...
Ghulam Lashari, Ondrej Lhoták, Michael McCo...
AINA
2006
IEEE
15 years 8 months ago
Distributed Tuning Attempt Probability for Data Gathering in Random Access Wireless Sensor Networks
In this paper, we study the problem of data gathering in multi-hop wireless sensor networks. To tackle the high degree of channel contention and high probability of packet collisi...
Haibo Zhang, Hong Shen
ASAP
2006
IEEE
147views Hardware» more  ASAP 2006»
15 years 8 months ago
Reconfigurable Shuffle Network Design in LDPC Decoders
Several semi-parallel decoding architectures have been explored by researchers for the quasi-cyclic low density parity check (LDPC) codes. In these architectures, the reconfigurab...
Jun Tang, Tejas Bhatt, Vishwas Sundaramurthy
KDD
2010
ACM
223views Data Mining» more  KDD 2010»
15 years 8 months ago
An efficient algorithm for a class of fused lasso problems
The fused Lasso penalty enforces sparsity in both the coefficients and their successive differences, which is desirable for applications with features ordered in some meaningful w...
Jun Liu, Lei Yuan, Jieping Ye
CEC
2007
IEEE
15 years 8 months ago
Fitness inheritance in evolutionary and multi-objective high-level synthesis
Abstract—The high-level synthesis process allows the automatic design and implementation of digital circuits starting from a behavioral description. Evolutionary algorithms are v...
Christian Pilato, Gianluca Palermo, Antonino Tumeo...