6608 search results - page 296 / 1322 » On the Completeness of Model Checking |
188
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SIMUTOOLS
2008
15 years 8 months ago
2008
Model checking is a suitable formal technique to analyze parallel programs' execution in an industrial context because automated tools can be designed and operated with very ...
158
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ISAAC
2007
Springer
16 years 1 months ago
2007
Springer
Checking value-sensitive data structures in sublinear space has been an open problem for over a decade. In this paper, we suggest a novel approach to solving it. We show that, in c...
166
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PDPTA
2003
15 years 8 months ago
2003
We present a novel approach to parallel Boolean satisfiability (SAT) checking. A distinctive feature of our parallel SAT checker is that it incorporates all essential heuristics ...
199
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TPHOL
2008
IEEE
16 years 1 months ago
2008
IEEE
Systems that can immediately react to their inputs may suffer from cyclic dependencies between their actions and the corresponding trigger conditions. For this reason, causality an...
139
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DATE
2010
IEEE
15 years 12 months ago
2010
IEEE
—Module paths are often used to specify the delays of cells in a Verilog cell library description, which define the propagation delay for an event from an input to an output. Sp...