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» On the Circuit Implementation Problem
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IPPS
1999
IEEE
15 years 11 months ago
Hardwired-Clusters Partial-Crossbar: A Hierarchical Routing Architecture for Multi-FPGA Systems
Multi-FPGA systems (MFSs) are used as custom computing machines, logic emulators and rapid prototyping vehicles. A key aspect of these systems is their programmable routing archit...
Mohammed A. S. Khalid, Jonathan Rose
ITC
1998
IEEE
94views Hardware» more  ITC 1998»
15 years 11 months ago
A method of serial data jitter analysis using one-shot time interval measurements
A method for measuring inter-symbol interference, duty cycle distortion, random jitter and periodic jitter is described. The Blackman-Tukey method of signal analysis is used. This...
Jan B. Wilstrup
FPGA
1998
ACM
142views FPGA» more  FPGA 1998»
15 years 11 months ago
A Hybrid Complete-Graph Partial-Crossbar Routing Architecture for Multi-FPGA Systems
Multi-FPGA systems (MFSs) are used as custom computing machines, logic emulators and rapid prototyping vehicles. A key aspect of these systems is their programmable routing archit...
Mohammed A. S. Khalid, Jonathan Rose
CASES
2006
ACM
15 years 11 months ago
Probabilistic arithmetic and energy efficient embedded signal processing
Probabilistic arithmetic, where the ith output bit of addition and multiplication is correct with a probability pi, is shown to be a vehicle for realizing extremely energy-efficie...
Jason George, B. Marr, Bilge E. S. Akgul, Krishna ...
ARITH
2001
IEEE
15 years 11 months ago
Computer Arithmetic-A Processor Architect's Perspective
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
Ruby B. Lee