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» On the Circuit Implementation Problem
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DAC
2003
ACM
16 years 8 months ago
Pushing ASIC performance in a power envelope
Power dissipation is becoming the most challenging design constraint in nanometer technologies. Among various design implementation schemes, standard cell ASICs offer the best pow...
Ruchir Puri, Leon Stok, John M. Cohn, David S. Kun...
230
Voted
DAC
2005
ACM
16 years 8 months ago
Hardware speech recognition for user interfaces in low cost, low power devices
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user in...
Sergiu Nedevschi, Rabin K. Patra, Eric A. Brewer
192
Voted
ICCAD
2004
IEEE
155views Hardware» more  ICCAD 2004»
16 years 4 months ago
A flexibility aware budgeting for hierarchical flow timing closure
—In this paper, we present a new block budgeting algorithm which speeds up timing closure in timing driven hierarchical flows. After a brief description of the addressed flow, ...
Olivier Omedes, Michel Robert, Mohammed Ramdani
214
Voted
AOSD
2009
ACM
16 years 2 months ago
Modelling hardware verification concerns specified in the e language: an experience report
e is an aspect-oriented hardware verification language that is widely used to verify the design of electronic circuits through the development and execution of testbenches. In rec...
Darren Galpin, Cormac Driver, Siobhán Clark...
FCCM
2009
IEEE
148views VLSI» more  FCCM 2009»
16 years 2 months ago
A Packet Generator on the NetFPGA Platform
— A packet generator and network traffic capture system has been implemented on the NetFPGA. The NetFPGA is an open networking platform accelerator that enables rapid developmen...
G. Adam Covington, Glen Gibb, John W. Lockwood, Ni...