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» On the Circuit Implementation Problem
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TOC
2010
147views Management» more  TOC 2010»
15 years 1 months ago
Quantum Expanders: Motivation and Construction
: We define quantum expanders in a natural way and give two constructions of quantum expanders, both based on classical expander constructions. The first construction is algebraic,...
Avraham Ben-Aroya, Oded Schwartz, Amnon Ta-Shma
TVLSI
2010
15 years 1 months ago
Test Data Compression Using Efficient Bitmask and Dictionary Selection Methods
Abstract--Higher circuit densities in system-on-chip (SOC) designs have led to drastic increase in test data volume. Larger test data size demands not only higher memory requiremen...
Kanad Basu, Prabhat Mishra
ISQED
2011
IEEE
230views Hardware» more  ISQED 2011»
14 years 11 months ago
Constraint generation for software-based post-silicon bug masking with scalable resynthesis technique for constraint optimizatio
Due to the dramatic increase in design complexity, verifying the functional correctness of a circuit is becoming more difficult. Therefore, bugs may escape all verification effo...
Chia-Wei Chang, Hong-Zu Chou, Kai-Hui Chang, Jie-H...
ASPDAC
2011
ACM
207views Hardware» more  ASPDAC 2011»
14 years 11 months ago
Vertical interconnects squeezing in symmetric 3D mesh Network-on-Chip
Abstract— Three-dimensional (3D) integration and Networkon-Chip (NoC) are both proposed to tackle the on-chip interconnect scaling problems, and extensive research efforts have b...
Cheng Liu, Lei Zhang 0008, Yinhe Han, Xiaowei Li
245
Voted
DAC
2011
ACM
14 years 7 months ago
TSV stress-aware full-chip mechanical reliability analysis and optimization for 3D IC
In this work, we propose an efficient and accurate full-chip thermomechanical stress and reliability analysis tool and design optimization methodology to alleviate mechanical rel...
Moongon Jung, Joydeep Mitra, David Z. Pan, Sung Ky...